Since the CS550116 analog-to-digital converter lacks a "start conversion" instruction, it continuously converts and outputs to the output register, which has 1024 main clock cycles. However, the ADC can be configured to output a conversion word when it is polled into the circuit by a standard dual JK flip-flop. The CS5501 converter can operate in its asynchronous communication model (UART) to transmit a 16-bit conversion word when it is polled by an RS-232 serial line (see figure). A null character (all 0s) is transferred to the circuit and the trigger FE2 is set. The CS5501 can output a single conversion word. This conversion word is passed as RS-232 as 2 bytes, which are the start bit and the stop bit, respectively. The baud rate can be selected by selecting the appropriate clock fraction at the clock ADC (SLCK) of the 74HC4040 counter/separator serial port.
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