1. Edge trigger composed of two level-triggered D flip-flops In order to improve the reliability of the flip-flop and enhance the anti-interference ability, it is hoped that the secondary state of the flip-flop depends only on the falling edge (or rising edge) of the CLK signal. The state of the input signal. The change in the input state before and after this has no effect on the secondary state of the trigger. In order to realize this idea, people have successively developed various edge-triggered flip-flop circuits.
Edge trigger feature: trigger flip control at the moment when the CP trigger edge comes, and the time to receive the input signal is also controlled at the previous moment when the CP trigger edge arrives. Therefore, the edge trigger has neither a flip phenomenon nor a one-time change problem, thereby greatly improving the reliability and anti-interference ability of the trigger operation.
The edge flip-flop circuit that has been used in digital integrated circuit products has two kinds of edge flip-flops composed of two level-triggered D flip-flops, an edge-trigger that maintains a blocking trigger, and an edge flip-flop that uses a gate circuit to transmit a delay time. Circuit structure form.
2. Maintain the blocking edge flip-flop to overcome the multiple flipping of the flip-flop during CLK=1.
Features: 1. Rising edge triggering; 2. The secondary state of the circuit after the trigger is the same as the input signal D; 3. The input signal D must be sent before the rising edge of the CP.
3. The edge trigger using the transmission delay time is flipped on the falling edge of the CP, and the flip direction is determined by the J and K input signals immediately before the CP falls. It only requires the input signal to remain unchanged during the G7 and G8 transitions before the falling edge of the CP, and any changes in the J and K signals during CP=0 and CP=1 will not affect the output of the flip-flop. This type of flip-flop has greater immunity to interference at the data input than maintaining a blocking trigger.
Edge Trigger Action Features: The secondary state of the flip-flop depends only on the logic state of the input when the rising edge (falling edge) of the clock signal arrives. Before or after this, the change of the input signal has no effect on the state of the trigger output.
The edge trigger effectively improves the anti-interference ability of the flip-flop, thus improving the operational reliability of the circuit.
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