Micrel Inc, an industry leader in high-performance analog and high-speed mixed-signal, local area network, and clock management and communications solutions, today introduced the SY88053CL and SY88063CL limiting post amplifiers. These two devices are ideal products to support the expansion of a new generation of passive optical network (PON) fiber-to-the-home (FTTH) XGPON and 10GEPON optical line terminal (OLT) applications. The product series is also suitable for fiber transceiver modules supporting multi-rate applications, with a maximum rate of up to 12.5Gbps, supporting Ethernet, Fibre Channel, optical transmission network (OTN) and CPRI / OBSAI data rates.
Tom Kapucija, director of marketing for the high-speed communications business of Mindray Semiconductor, said: "These two new devices have many impressive new features, including new high bandwidth levels, programmable wide-range SD Assert and LOS De-Assert thresholds High-level input sensitivity, 4dB electrical hysteresis, and high-stability SD Assert and LOS De-Assert clock management that meet the stringent requirements of the new generation of PON networks. These new features help expand system extension range and extend link uptime To increase the payload bandwidth to optimize link efficiency. "
Rami Kanama, vice president of the Clock Management and Communications Division, said: "As the market's increased demand for transmitting more data at higher rates, in order to meet this demand, operators must upgrade their line side equipment and transform their networks. As always, Swiss Semiconductor strives to meet this demand at the device level. The speed, performance, and characteristics of our new optical limiting amplifiers are critical to solving the technical challenges facing next-generation fiber-to-the-home, enterprise, and transmission networks. As link efficiency increases, system vendors can provide higher data transmission performance, potentially reducing operator capital expenditures and operating costs. "
These two devices provide fast SD Assert and LOS De-Assert clocks in the fully differential input voltage range of 5mVPP to 1800mVPP, supporting improved link efficiency and optimization. The wide LOS / SD threshold range of 3mVPP to 30mVPP provides 4dB of electrical hysteresis. The integrated 50 Ohm input and output impedance optimizes the integrity of high-speed signals while reducing the number of external components and saving costs. The TTL compatible JAM input supports SQUELCH by returning LOS or SD signals.
SY88053CL supports decision threshold adjustment that can be adjusted by the user in noise applications where the noise is asymmetrically distributed, thereby supporting optimized bit error rate operation. SY88063CL provides a digital deviation correction function that can be selected by the user, which can automatically compensate for internal device deviations in high-speed data channels. Other features include 1Gbps to 12.5Gbps multi-rate operation, optional LOS or SD output, optional RXOUT + / RXOUT- signal polarity (SY88053CL), and a typical rise / fall time of 25ps. By increasing the performance margin that exceeds current customer needs, the manufacturability of the module is improved, while reducing costs. By increasing the downstream branch of each node and the margin beyond the 512ns link establishment budget, link efficiency and data throughput are improved. By optimizing the bit error rate in a noisy environment and compensating for the asymmetric noise characteristics of EDFA or RAMAN optical amplifiers, the system extension range is expanded and data throughput is improved.
The two devices support a wide power supply range of 3.3V ± 10%, with an industrial temperature range of -40 ° C to + 85 ° C, and come in a tiny 3mm x 3mm QFN package.
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